Power Factor Correction (“PFC”) systems are typically used within power supply applications requiring ac/dc rectification. Rectifying arrangements for use in such an application may comprise a full wave voltage rectifier, typically in the form of a diode bridge, and a main Switch Mode Power Supply (“SMPS”) to provide regulation of the output waveform. PFC circuits are inserted between the line and the main SMPS to draw a sinusoidal current from the line and to provide Direct Current (“DC”) voltage to the main SMPS. For many systems to operate properly, it is desirable for the output voltage of the PFC circuit to be within a specified range. PFC circuits deliver a squared sinusoidal power that matches an average power demand of the load. Thus, when the power fed to the load is lower than the demand, the output capacitor compensates for the lack of energy by discharging and when the power fed to the load is greater than the demand, the capacitor stores the excess energy. As a consequence, a ripple appears in the output voltage that designers compensate for by integrating the output voltage. A drawback with the integration is that it degrades the dynamic performance of the PFC systems and makes them slow. For example, an abrupt decrease in the load results in high output voltage overshoot and an abrupt increase in the load results in a high output voltage undershoot.
Hence, there exists a need for a regulator circuit having an overload protection circuit and a method of improving the dynamic performance and speed of the regulator circuit. In addition, it is desirable for the regulator circuit to be cost and time efficient to manufacture.